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Europe completes the first phase of the silicon independent project

Europe completes the first phase of the silicon independent project

The European Processor Project (EPI) has completed the first phase of manufacturing European chips, hoping to reduce dependence on imports, improve sovereignty capabilities, and create the first tens of billions of supercomputers on the European continent.

EPI year-end ReportThe report released this week pointed out some major achievements, including the delivery of the “Rhea” specification, the first-generation EPI general-purpose processor (GPP) implementation and its future derivatives.

Rhea is built on Arm’s Neoverse V1 processor architecture, but it also has 29 RISC-V cores deployed as controllers. Rhea is planned to be deployed in a tens of billions of super system in 2023.

The chip was designed by the French company SiPearl, which designed the chip in cooperation with Atos.

SiPearl CEO Philippe Notton told RegisterIn October 2021, Intel’s upcoming Ponte Vecchio GPU accelerator will be paired with the Rhea chip in the supercomputer.

Use an open source instruction set architecture to ensure that it is not affected by proprietary licenses and export restrictions

Rhea will also use the RISC-V power controller developed by the University of Bologna and ETH Zurich. According to EPI, the controller uses “advanced control and artificial intelligence algorithms for large-scale system-on-chip power management.”

Another achievement of the first phase is the work on security IP, which provides high-level, common-standard-certified sovereign security IP for HPC and edge processors. One output of this work is an “encryption block” for integration into other open chips.

The development of the European Processor Accelerator (EPAC) test chip proof of concept is another achievement in the first phase.

The Barcelona Supercomputing Center and the University of Zagreb in Croatia have developed vector processing units for high-performance, low-power calculations.It is based in Barcelona Semidynamics’ Wise RISC-V core .

The project also provides a proof of concept for innovative embedded high-performance computing platforms and related software development kits for the automotive market.

Most of EPI’s work is done on the RISC-V architecture. The RISC-V architecture is usually called the Linux of the chip. Engineers collaborate to design, set up and improve the architecture. It was created by researchers in 2010 and can be licensed for free.

The architecture provides a modular design that allows developers to choose from extensions that add professional vector processing, security, and virtualization capabilities.

EPI said: “The use of open source instruction set architecture ensures that it is not affected by proprietary licenses and export restrictions.” This is a recognition of the fact that Arm and Intel produce high-quality products, but they are subject to government supervision and can prevent their technology from crossing. boundary.

EPI has 28 partners and conducts chip design cooperation in 10 European countries/regions. The first phase of the plan has a budget of 79 million euros, and the funds will be used for European startups, companies and researchers to develop chips.

It is hoped that the project will strengthen the local supply chain by building more fabs throughout the African continent to develop sovereign production capacity and solve the problem of semiconductor shortages, which have slowed the production of equipment from cars to smartphones. raspberry pie.

The second phase of EPI will begin next year, focusing on putting the chips developed in the first phase into production. ®

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